final
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final [2009/08/24 19:52] – lan | final [2009/09/02 15:32] (current) – lan | ||
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**Scope of the Final** | **Scope of the Final** | ||
- | The scope of the final includes all materials covered after the midterm (Test #1), i.e., Hardware and Verilog, the Single-Cycle CPU, Pipelining, Caches, and Labs K to N. Corresponding chapters in the textbook are chapters 4 and 5 (in the 4th edition) or chapters 5, 6, and 7 (in the 3rd edition). | + | The scope of the final includes all materials covered after the midterm (Test #1), i.e., Hardware and **Verilog** (e.g., structural modeling), the Single-Cycle CPU, Pipelining, Caches, and Labs K to N. Corresponding chapters in the textbook are chapters 4 and 5 in the 4th edition |
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**Winter 2009 Exam and Answers** | **Winter 2009 Exam and Answers** | ||
- | You can try the last term final exam [[http:// | + | You can try the last term final exam [[http:// |
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* If the instructor does not agree (or if you contact the instructor after the deferred exam date) you must then file a formal petition for deferred standing using the Petition Package forms available from this link to the Registrar' | * If the instructor does not agree (or if you contact the instructor after the deferred exam date) you must then file a formal petition for deferred standing using the Petition Package forms available from this link to the Registrar' | ||
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+ | **Final Exam Solutions** | ||
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+ | [[http:// |
final.1251143569.txt.gz · Last modified: 2009/08/24 19:52 by lan