General Information

• The final (Test #2) will be held on Aug 29 at VH 3006 from 7-10pm.
• This is a closed-book, 3-hour test.
• No aids allowed. No calculators allowed. Blank sheets of paper are not allowed.
• The MIPS green card, system call sheets and the needed datapath / control diagrams will be provided.

Scope of the Final

The scope of the final includes all materials covered after the midterm (Test #1), i.e., Hardware and Verilog, the Single-Cycle CPU, Pipelining, Caches, and Labs K to N. Corresponding chapters in the textbook are chapters 4 and 5 (in the 4th edition) or chapters 5, 6, and 7 (in the 3rd edition).

Winter 2009 Exam and Answers

You can try the last term final exam (Winter 2009), compare your answers with its solutions and discuss your questions/answers with other students in the Discussion Group.