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course_outline [2009/12/29 17:13] – allisoncourse_outline [2009/12/30 02:50] – allison
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 York University,  Toronto, Ontario York University,  Toronto, Ontario
  
-Class meets TR 16:00-17:30 SC 303 
  
-Labs as scheduled by registrar  
-  * LAB01 M 13:00-16:00 CSE 1004  
-  * LAB02 F 13:00-16:00 CSE 1004 (may be canceled) 
  
-Instructor :  Robert Allison, CSE 3051, allison@cse.yorku.ca, 416-736-2100 x20192 
-office hours: TBD. 
  
-TA: Cyrus Minwalla.+[[https://w2prod.sis.yorku.ca/Apps/WebObjects/cdm.woa/34/wo/RBHo4bO8mxAEcxUbcf11l0/3.1.8.17|Fall/Winter 2009-2010 Schedule]] 
 + 
 + 
 + 
 +====== Contact ====== 
 + 
 +[[contact | Instructor: R. Allison; TA: Cyrus Minwalla]]
  
 ====== Overview ====== ====== Overview ======
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 ====== Topics (tentative) ====== ====== Topics (tentative) ======
  
 +^  Week  ^  Dates  ^  Lecture  ^  Lab  ^
 +| 1  | Jan 5, 7 | Introduction  | No lab  |
 +| 2  | Jan 12, 14  | microcontrollers, 68HCS12 architecture and instruction set | Lab 0 (Safety Issues, Introduction to Facilities and Tutorial  |
 +| 3  | Jan 19, 21  | Peripherals  | Lab 1  |
 +| 4  | Jan 26, 28  | Interrupts  | Lab 2  |
 +| 5  | Feb 2, 4 | Test #1 Mar 31, Peripherals & Interrupts  | Lab 3  |
 +| 6  | Feb 9, 11   | Memory and Busses   | Lab 3 con't   |
 +|    | Feb 16, 18  | READING WEEK  | No lab  |
 +| 7  | Feb 23, 25  | Interfacing  | Lab 4  |
 +| 8  | Mar 2, 4   | Interfacing  | Lab 4  |
 +| 9  | Mar 9, 11   | Analogue interfacing, Test #2 Apr 28  | Lab 5  |
 +| 10  | Mar 16, 18   | Programmable Logic and Rapid prototyping using FPGAs  |Lab 5 con't  |
 +| 11  | Mar 23, 25   | Power, High Speed and other design constraints (time permitting)  | Lab 6  |
 +| 12  | Mar 30, Apr 1   | Power, High Speed and other design constraints (time permitting)  | Lab 6  |
 +| 13  | Apr 5   | no class  | Lab 6  |
  
-Week 1:  
-  
- 
-Dates 
-  
- 
-Lecture 
-  
- 
-Lab 
- 
-1 
-  
- 
-March 5 
-  
- 
-Introduction 
-  
- 
-No lab 
- 
-2 
-  
- 
-Mar 10, 12 
-  
- 
-microcontrollers, 68HCS12 architecture and instruction set 
-  
- 
-Lab 0 (Safety Issues, Introduction to Facilities and Tutorial 
- 
-3 
-  
- 
-Mar 17, 19 
-  
- 
-Peripherals 
-  
- 
-Lab 1 
- 
-4 
-  
- 
-Mar 24, 26 
-  
- 
-Interrupts 
-  
- 
-Lab 2 
- 
-5 
-  
- 
-Mar 31, Apr 2 
-  
- 
-Test #1 Mar 31, Peripherals & Interrupts 
-  
- 
-Lab 3 
- 
-6 
-  
- 
-Apr 7, 9 
-  
- 
-Memory and Busses 
-  
- 
-Lab 3 con't 
- 
-7 
-  
- 
-Apr 14, 16 
-  
- 
-Interfacing 
-  
- 
-Lab 4 
- 
-8 
-  
- 
-Apr 21,23 
-  
- 
-Interfacing 
-  
- 
-Lab 4 
- 
-9 
-  
- 
-Apr 28, 30 
-  
- 
-Analogue interfacing, Test #2 Apr 28 
-  
- 
-Lab 5 
- 
-10 
-  
- 
-May 5, 7 
-  
- 
-Programmable Logic and Rapid prototyping using FPGAs 
-  
- 
-Lab 5 con't 
- 
-11 
-  
- 
-May 12, 14 
-  
- 
-Power, High Speed and other design constraints (time permitting) 
-  
- 
-Lab 6 
- 
-12 
-  
- 
-May 19 
-  
- 
-Test #3 May 19 
-  
- 
-Lab 6 on May 20 (treated as Monday, May 18 is Victoria Day holiday) 
- 
-Note May 18 is a Stat. Holiday. 
  
 ====== Evaluation ====== ====== Evaluation ======
  
-[[grades]]+[[grades| Grades and Grading]]
  
  
course_outline.txt · Last modified: 2009/12/30 13:35 by allison