course_outline
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| course_outline [2010/11/03 11:31] – asif | course_outline [2010/12/07 10:41] (current) – asif | ||
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| |**Nov. 08, 2010** | Boolean Algebra:| Appendix B.1 - B.7 |[[http:// | |**Nov. 08, 2010** | Boolean Algebra:| Appendix B.1 - B.7 |[[http:// | ||
| |-|Designing a prototype SPIM ALU|-|[[http:// | |-|Designing a prototype SPIM ALU|-|[[http:// | ||
| - | |**Nov. 15, 2010** | Hardware:| Appendix B.1 - B.7 |Handout # 8| | + | |**Nov. 15, 2010** | Hardware:| Appendix B.1 - B.7 |[[http:// |
| - | |-|Sequential and Combinational Circuits |-|Handout # 8| | + | |-|Sequential and Combinational Circuits |-|[[http:// |
| - | |**Nov. 22, 2010** | Hardware:| Appendix | + | |**Nov. 22, 2010** | Hardware:| Appendix |
| - | |-|Building a Datapath|Sections 4.1 - 4.3|Handout # 9| | + | |-|Building a Datapath|Sections 4.1 - 4.4|[[http:// |
| - | |**Nov. 29, 2010** | Single | + | |**Nov. 29, 2010** | Control for Single Cycle Implementation| Appendix C.2 |[[http:// |
| - | |-|Datapath and Control|Section 4.4|Handout # 10| | + | |-|-|-|[[http:// |
| - | |**Dec. 06, 2010** | Pipelining: | + | |**Dec. 01, 2010** | Multi Cycle Implementation: |
| - | |-|Hazards, Datapath, and Control|4|Handout # 11| | + | |-|Datapath and Control|Notes |[[http:// |
| + | |**Dec. 06, 2010** | Pipelining: | ||
| + | |-|Hazards, Datapath, and Control|-|[[http:// | ||
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