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Learning Objectives and Course Outline

Learning Objectives

By the end of the course, the students will be able to:

  1. Translate high-level programs (such as those in Java or C) to assembly language and, finally, in machine language on an instruction-by-instruction basis.
  2. Write and debug simple programs involving input/output routines, arithmetic operations, decisions, repetitions, and procedures directly in an assembly language such as MIPS.
  3. Design a prototype Arithmetic Logic Unit (ALU) from basic building blocks such as gates and flip flops using elementary logic design concepts.
  4. Construct the datapath and control unit of the processor using either of the: (i) single cycle implementation; (ii) multiple cycle implementation, or (iii) pipelining; and explain how computer execute programs in these implementations.
  5. Abstract computer hardware by building modules in a hardware description language such as Verilog.

Course Outline

The course outline is a guideline to topics that will be discussed in the course, and when they will be discussed. The sequence in which topics wil be taught are subject to change. Instructors transparencies, if applicable, will also be made available here.

Week Topics Readings Handouts
Sep. 13, 2010 Overview and Performance Sections 1.0 - 1.6 Handout # 1A
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Sep. 20, 2010 Data Translation: Sections 2.1 - 2.4 Handout # 2 (1 slide/page)
-Code Translation - -
-Basic MIPS Instructions-MIPS Instructions
Sep. 27, 2010 Machine Language Programming I: Sections 2.5 - 2.7 Handout # 3 (1 slide/page)
-Basic MIPS Instructions- Handout # 3 (4 slides/page)
Oct. 04, 2010 Machine Language Programming II: Sections 2.8 - 2.9 Handout # 4
-Procedures; Stack; Branch and Jump Instructions-Handout # 4
Oct. 11, 2010 Reading week
Oct. 18, 2010 Machine Language Programming III: Sections 2.10 - 2.13 Handout # 5
-Immediate Operands; Characters and Strings-Handout # 5
Oct. 25, 2010 Machine Language Programming IV: Section 3.5 Handout # 5
-Floating Point Instructions-Handout # 6
Nov. 01, 2010 Midterm Exam
Nov. 08, 2010 Boolean Algebra: Appendix B.1 - B.7 Handout # 7
-esigning a prototype SPIM ALU-Handout # 7
Nov. 15, 2010 Hardware: Appendix B.1 - B.7 Handout # 8
-Sequential and Combinational Circuits -Handout # 8
Nov. 22, 2010 Hardware: Appendix B.7 - B.10 Handout # 9
-Building a DatapathSections 4.1 - 4.3Handout # 9
Nov. 29, 2010 Single and Multi Cycle Implementations: Appendix C.2 Handout # 10
-Datapath and ControlSection 4.4Handout # 10
Dec. 06, 2010 Pipelining: Sections 4.5 - 4.9 Handout # 11
-Hazards, Datapath, and Control4Handout # 11
course_outline.1285793994.txt.gz · Last modified: 2010/09/29 20:59 by asif

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