Computers are usually viewed as having a structure organized into several levels, ranging from high-level programming languages such as Java to digital logic circuits. Each level provides specific resources and abstractions for the programmer. The course provides students with the basic understanding of the computers at the low-lying levels of this structure. This includes programming in assembly and machine language, computer organization (CPU, DRAM, I/O, and buses), CPU structure (Datapath and Control), and digital logic. The presentation is centered on performance and covers topics like caching, pipelining, and parallel processing. The course presents theoretical concepts as well as concrete implementations on a modern, RISC processor. The following topics are covered in the course.

1. Computer Organization and Performance

2. Assembly Language Programming (MIPS)

3. Machine Language, SPIM simulator.

4. Data Representation

5. Hardware abstraction through Verilog

6. ALU: Datapath and Control.

7. Datapath and Control (Single cycle and multiple cycles).

8. Pipelines

9. Caches

Verilog, a hardware description language used to design electronic systems, will be introduced to the students in the lab.

J. L. Hennessy and D. A. Patterson, Computer Organization and Design; The Hardware/Software Interface, San Francisco, CA: Morgan Kaufmann Publishers Inc., 4th Edition (2009). ISBN # 978-0-12-374493-7.

Arranged in an alphabetical order based on the last name of the first author.

1. V. C. Hamacher, Z. G. Vranesic, and S.G. Zaky, Computer Organization, McGraw-Hill, 5th Edition (2002).

2. G. Kane and J. Heinrich, MIPS RISC Architecture, NY: Prentice Hall (1992).

3. William Stallings, Computer Organization and Architecture: Designing for Performance, Prentice Hall, 7th edition (2006).

4. Andrew S. Tanenbaum, Structured Computer Organization, NY: Prentice Hall, 5th edition (2006).

• Tuesdays and Thursdays, 1:00pm - 2:30pm, ACW 307

• Mondays, 2:30pm - 5:30pm, CSE 3057
• Fridays, 1:30pm - 4:30pm, CSE 3057