Differences

This shows you the differences between two versions of the page.

--- whats_new [2011/08/01 19:10] – skhan
+++ whats_new [2011/08/17 19:21] (current) – skhan
@@ Line 3: / Line 3: @@
 New announcements will be posted here in reverse chronological order.
+----
+**Wed Aug 17, 2011**
+   *The marks of the Final Exam and the overall letter grades are now on ePost (these grades are unofficial until approved by the Senate). The letter grades are based on the weighted sum of the three components: Midterm, Final, and Labs. The breakdown of the Labs component is posted under the 2021L course as before. If you suspect errors in your letter grade, take one of the following actions depending on the type of error: If you see an arithmetic error (i.e. the posted component marks do not add up to the posted letter grade) then email me. On the other hand if you suspect an error in the marking of your second test then wait until the test papers are in the Department Office (around the middle of Sept) and then request a copy of your exam from the Dept Office and, if needed, submit a petition to the Dept Office.
+----
+**Tue Aug 2, 2011**
+  *For the Verilog part of the exam, please review all four Verilog labs.
 ----
 **Mon Aug 1, 2011**
+  *Additional office hours for this week: Wed August 3, 4:00-6:00 pm.
   *The final exam will be a closed book, 180-min test covering everything that was covered after the midterm; i.e. the five topics: floating-point, Verilog, single-cycle, pipelines, and caches. Bring a photo ID and optionally a calculator and an information sheet (one 8.5×11” sheet on which you can write or type on either side). Note that the MIPS Green Card, the SPIM system call table, and the CPU diagrams will be provided.