CSE2021

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format [2011/01/25 16:19] – roumaniformat [2011/01/25 16:19] (current) – roumani
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 By the end of the course, you are expected to be able to: By the end of the course, you are expected to be able to:
  
-  - Translate a given high-level program to assembly/machine language+  * Translate a given high-level program to assembly/machine language
     * Represent numbers, characters, and other forms of data in binary     * Represent numbers, characters, and other forms of data in binary
     * Express logic using assembly language instructions     * Express logic using assembly language instructions
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     * Encode assembly language instructions in machine language format      * Encode assembly language instructions in machine language format 
          
-  - Build a CPU out of basic building blocks such as gates and flip-flops+  * Build a CPU out of basic building blocks such as gates and flip-flops
     * Build the ALU using gates and Verilog     * Build the ALU using gates and Verilog
     * Design the CPU's datapath and control     * Design the CPU's datapath and control
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     * Augment the CPU with a cache     * Augment the CPU with a cache
  
-  - Assess the end-to-end performance+  * Assess the end-to-end performance
     * Identify the key performance drivers and their physical limits     * Identify the key performance drivers and their physical limits
     * Compare and contrast the RISC and CISC approaches     * Compare and contrast the RISC and CISC approaches
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