Fall 2011

CSE2021 explores how a processor's hardware and software interact to accomplish a given computational task. Our description of the inner workings of a computer will use an hierarchy of abstractions. We will follow the journey of instructions from high-level to assembly and machine code, through RAM and caches, to the logic circuits within the CPU core that make up the computer's datapath and control elements. Lecture material is supplemented with labs that provide hands-on experience in MIPS and Verilog.

• Professor: Hugh Chesser – chesser AT yorku DOT ca.

• Lectures: MW 17:30-19:00 in SLH E.
• Office Hours: After lecture or by appointment.

• Lab-01: M 19:00-22:00 in CSEB 1006.
• Lab-02: T 19:00-22:00 in CSEB 1006.

Required (available in the bookstore):

• Computer Organization and Design: The Hardware / Software Interface, 4th edition by D. Patterson and J. Hennessy, Morgan Kaufmann Publishers (Elsevier) (2008). (3rd Edition is on reserve in Steacie)

References:

• Structured Computer Organization, 5th edition, by Andrew S. Tanenbaum, Prentice Hall (2006)

• MIPS RISC Architecture, by G. Kane & J. Heinrich, Prentice Hall (1992)

• Computer Organization, 5th Edition, by V.C. Hamacher, Z.G. Vranesic & S.G. Zaky, McGraw-Hill (2002)

• Computer Organization and Architecture: Designing for Performance, 7th edition, by William Stallings, Prentice Hall (2006)

• TBA