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format [2011/01/05 19:33] roumaniformat [2011/01/25 16:19] (current) roumani
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-====== Format ====== 
- 
 ===== Expected Learning Outcomes ===== ===== Expected Learning Outcomes =====
  
 By the end of the course, you are expected to be able to: By the end of the course, you are expected to be able to:
  
-  Translate a given high-level OOP program to assembly/machine language +  Translate a given high-level program to assembly/machine language 
-  Build an ALU out of basic building blocks such as gates and flip-flops +    * Represent numbers, characters, and other forms of data in binary 
-  - Assess the end-to-end performance of a given computer system, from statements to gates +    * Express logic using assembly language instructions 
- +    * Utilize registers, the stack, the heap, and the data segment to store data 
-===== Activities ===== +    * Encode assembly language instructions in machine language format  
- +     
-  **Labs** +  Build a CPU out of basic building blocks such as gates and flip-flops 
-The labs focus on technology. They are self-contained and enable you to learn the MIPS assembly and machine languages and explore the CPU datapath and control through Verilog.  +    * Build the ALU using gates and Verilog 
- +    Design the CPU'datapath and control 
-  **Lectures** +    Implement a pipeline and handle its hazards 
-The lectures focus on concepts, principles, and the big-picture. Certain MIPS-specific details are also covered to demonstrate complex ideas or to compare and contrast implementations.  +    Augment the CPU with a cache
- +
-  * **Quizzes and Games** +
- +
-Some lectures will include pop quizzes or games such as Jeopardy aimed at reviewing and discussing ideas, uncovering fallacies, and avoiding pitfalls. These activities are intended for active-learning, not assessment. +
- +
-  * **Assigned Readings**+
  
-The lecture notes (linked to from the Weekly Schedule) include assigned readings from the textbook and from selected articles. These are integral parts of the learning experience of this course.+  * Assess the end-to-end performance 
 +    * Identify the key performance drivers and their physical limits 
 +    * Compare and contrast the RISC and CISC approaches 
 +    * Compute the throughput of a pipelined CPU for a given code fragment 
 +    * Analyze the effect of a cache of a given specs on the system's performance 
  
-  * **Forum** 
-You are strongly encouraged to contribute to this group. By simply framing an issue into a question, you help sharpen the learning focus for yourself and for others. And by answering a question or engaging in a discussion, you sharpen your ability to prove a point or assess one. 
format.1294256014.txt.gz · Last modified: 2011/01/05 19:33 by roumani

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