course_outline
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course_outline [2009/12/30 02:21] – allison | course_outline [2011/12/30 15:25] (current) – allison | ||
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York University, | York University, | ||
- | Class meets TR 16:00-17:30 SC 303 | ||
- | Labs as scheduled by registrar | ||
- | * LAB01 M 13:00-16:00 CSE 1004 | ||
- | * LAB02 F 13:00-16:00 CSE 1004 (may be canceled) | ||
- | Instructor : Robert Allison, CSE 3051, allison@cse.yorku.ca, | ||
- | office hours: TBD. | ||
- | TA: Cyrus Minwalla. | + | [[https://w2prod.sis.yorku.ca/ |
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+ | ====== Contact ====== | ||
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+ | [[contact | Instructor: R. Allison; TA: Kyle Watters, Nariman Farsad]] | ||
====== Overview ====== | ====== Overview ====== | ||
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- | The departmental prerequisites for this course are general pre-requisites and CSE3201.04 (i.e. the latest version of the course, taught using Verilog and with a hardware lab component). Students should have a good understanding of digital and analogue electronics and computer organisation. You should also be familiar with assembly programming (C programming will be very helpful). | + | The departmental prerequisites for this course are general pre-requisites and CSE3201.04 (i.e. the latest version of the course, taught using Verilog and with a hardware lab component). Students should have a good understanding of digital and analogue electronics and computer organisation. You should also be familiar with assembly |
====== Topics (tentative) ====== | ====== Topics (tentative) ====== | ||
^ Week ^ Dates ^ Lecture | ^ Week ^ Dates ^ Lecture | ||
- | | 1 | Jan 5, 7 | Introduction | + | | 1 | Jan 3, 5 | Introduction |
- | | 2 | Jan 12, 14 | + | | 2 | Jan 10, 12 | Microcontrollers, 68HCS12 architecture and instruction set | Lab 0 (Safety Issues, Introduction to Facilities and Tutorial |
- | | 3 | Jan 19, 21 | + | | 3 | Jan 17, 19 | Peripherals |
- | | 4 | Jan 26, 28 | + | | 4 | Jan 24, 26 | Interrupts |
- | | 5 | Feb 2, 4 | Test #1 Mar 31, Peripherals & Interrupts | + | | 5 | Jan3, Feb 2 | Peripherals & Interrupts |
- | | 6 | Feb 9, 11 | Memory and Busses | + | | 6 | Feb 7, 9 | Memory and Busses |
- | | 7 | + | | 7 | Feb 14, 16 | Interfacing |
- | + | | | Feb 22, 24 | READING WEEK | No lab | | |
- | + | | 8 | Feb 28,Mar 1 | Interfacing | |
- | + | | 9 | Mar 6, 8 | |
- | + | | 10 | Mar 13, 15 | |
- | + | | 11 | Mar 20, 22 | |
- | + | | 12 | Mar 27, 29 | Power, High Speed and other design constraints (time permitting) | |
- | + | | 13 | Apr 3 | Lab demos | Lab 6 | | |
- | Interfacing | + | |
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- | Lab 4 | + | |
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- | Interfacing | + | |
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- | Lab 4 | + | |
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- | 9 | + | |
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- | Analogue interfacing, Test #2 Apr 28 | + | |
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- | Lab 5 | + | |
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- | Programmable Logic and Rapid prototyping using FPGAs | + | |
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- | Lab 5 con' | + | |
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- | Power, High Speed and other design constraints (time permitting) | + | |
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- | Lab 6 | + | |
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- | 12 | + | |
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- | Test #3 May 19 | + | |
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- | Lab 6 on May 20 (treated as Monday, May 18 is Victoria Day holiday) | + | |
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+ | Quizzes will be held during class periods. | ||
====== Evaluation ====== | ====== Evaluation ====== | ||
- | [[grades]] | + | [[grades| Grades and Grading]] |
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====== Laboratory ====== | ====== Laboratory ====== | ||
- | A mandatory hardware | + | [[laboratory:start| Lab information]] |
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- | Labs require preparatory work, which must be completed and approved prior to starting the lab. YOU WILL NOT BE ALLOWED TO START THE LAB IF YOU HAVE NOT SUBMITTED COMPLETE PREPATORY WORK. Students are required to document their lab work in their lab notebooks and with other appropriate documentation. This includes documenting all data collected and answering all questions posed. Students must present the documentation, | + | |
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- | The laboratory is hands on and students should have experience with electronic circuits, computer organization and digital logic (e.g. strongly recommended or prerequisite courses are Phys 3150, COSC 2021, COSC 3201). | + | |
course_outline.1262139712.txt.gz · Last modified: 2009/12/30 02:21 by allison