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--- course_outline [2009/12/30 04:24] – allison
+++ course_outline [2011/12/30 15:25] (current) – allison
@@ Line 9: / Line 9: @@
-[[https://w2prod.sis.yorku.ca/Apps/WebObjects/cdm.woa/34/wo/RBHo4bO8mxAEcxUbcf11l0/3.1.8.17|Fall/Winter 2009-2010 Schedule]]
+[[https://w2prod.sis.yorku.ca/Apps/WebObjects/cdm.woa/7/wo/2XA7pU4pLt5PLDEQSENaag/3.1.9.8.3.0.0.5|Fall/Winter 2011-2012 Schedule]]
@@ Line 15: / Line 15: @@
 ====== Contact ======
-[[contact | Instructor: R. Allison; TA: Cyrus Minwalla]]
+[[contact | Instructor: R. Allison; TA: Kyle Watters, Nariman Farsad]]
 ====== Overview ======
@@ Line 24: / Line 24: @@
-The departmental prerequisites for this course are general pre-requisites and CSE3201.04 (i.e. the latest version of the course, taught using Verilog and with a hardware lab component). Students should have a good understanding of digital and analogue electronics and computer organisation. You should also be familiar with assembly programming (C programming will be very helpful).
+The departmental prerequisites for this course are general pre-requisites and CSE3201.04 (i.e. the latest version of the course, taught using Verilog and with a hardware lab component). Students should have a good understanding of digital and analogue electronics and computer organisation. You should also be familiar with assembly and C programming (CSE 2031, CSE 2021).
 ====== Topics (tentative) ======
 ^  Week  ^  Dates  ^  Lecture  ^  Lab  ^
-| 1  | Jan 5, 7 | Introduction  | No lab  |
+| 1  | Jan 3, 5 | Introduction  | No lab  |
-| 2  | Jan 12, 14  | microcontrollers, 68HCS12 architecture and instruction set | Lab 0 (Safety Issues, Introduction to Facilities and Tutorial  |
+| 2  | Jan 10, 12  | Microcontrollers, 68HCS12 architecture and instruction set | Lab 0 (Safety Issues, Introduction to Facilities and Tutorial  |
-| 3  | Jan 19, 21  | Peripherals  | Lab 1  |
+| 3  | Jan 17, 19  | Peripherals  | Lab 1  |
-| 4  | Jan 26, 28  | Interrupts  | Lab 2  |
+| 4  | Jan 24, 26  | Interrupts  | Lab 2  |
-| 5  | Feb 2, 4 | Test #1 Mar 31, Peripherals & Interrupts  | Lab 3  |
+| 5  | Jan3, Feb 2 | Peripherals & Interrupts  | Lab 3  |
-| 6  | Feb 9, 11   | Memory and Busses   | Lab 3 con't   |
+| 6  | Feb 7, 9   | Memory and Busses   | Lab 3 con't   |
-|    | Feb 16, 18  | READING WEEK  | No lab  |
+| 7  | Feb 14, 16  | Interfacing  | Lab 4  |
-| 7  | Feb 23, 25  | Interfacing  | Lab 4  |
+|    | Feb 22, 24  | READING WEEK  | No lab  |
-| 8  | Mar 2, 4   | Interfacing  | Lab 4  |
+| 8  | Feb 28,Mar 1  | Interfacing  | Lab 4  |
-| 9  | Mar 9, 11   | Analogue interfacing, Test #2 Apr 28  | Lab 5  |
+| 9  | Mar 6, 8   | Analogue interfacing  | Lab 5  |
-| 10  | Mar 16, 18   | Programmable Logic and Rapid prototyping using FPGAs  |Lab 5 con't  |
+| 10  | Mar 13, 15   | Programmable Logic and Rapid prototyping using FPGAs  |Lab 5 con't  |
-| 11  | Mar 23, 25   | Power, High Speed and other design constraints (time permitting)  | Lab 6  |
+| 11  | Mar 20, 22   | Power, High Speed and other design constraints (time permitting)  | Lab 6  |
-| 12  | Mar 30, Apr 1   | Power, High Speed and other design constraints (time permitting)  | Lab 6  |
+| 12  | Mar 27, 29   | Power, High Speed and other design constraints (time permitting)  | Lab 6  |
-| 13  | Apr 5   | no class  | Lab 6  |
+| 13  | Apr 3   | Lab demos  | Lab 6  |
+Quizzes will be held during class periods.
 ====== Evaluation ======
@@ Line 54: / Line 55: @@
 ====== Laboratory ======
-[[laboratory| Lab information]]
+[[laboratory:start| Lab information]]