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Expected Learning Outcomes

By the end of the course, you are expected to be able to:

Translate a given high-level program to assembly/machine language  Represent numbers, characters, and other forms of data in binary  Express logic using assembly language instructions  Utilize registers, the stack, the heap, and the data segment to store data  Encode assembly language instructions in machine language format  Build a CPU out of basic building blocks such as gates and flip-flops  Build the ALU using gates and Verilog  Design the CPU's datapath and control  Implement a pipeline and handle its hazards  Augment the CPU with a cache  Assess the end-to-end performance  Identify the key performance drivers and their physical limits  Compare and contrast the RISC and CISC approaches  Compute the throughput of a pipelined CPU for a given code fragment  Analyze the effect of a cache of a given specs on the system's performance Instructor & Office Hours  Instructor: Gulzar Khuwaja– http://www.cse.yorku.ca/~khuwaja  Lectures: R 7:00-10:00 pm in LSB 101  Lab-01: M 7:00-10:00 pm in LAS 1006  Office Hours: M R 5:30-6:30 pm in LAS 2018  Office Phone: +1-416-736-2100 x 77874 (available only during office hours)  Email: khuwaja@cse.yorku.ca  Email Filter: The string CSE2021/X in the Subject field, where X is your username on red@cse Teaching Assistants The TA is here to help you with any question you may have about the course. You are encouraged to go to his office hours and benefit from his knowledge. The table below shows the TA schedule.

TIME OFFICE NAMES TYPE OF HELP OFFERED TBA LAS-TBA tim, mohammad, huai Any question about the course, including labs

		Any pending lab-related question placed on the forum by Friday of each week

Add @cse.yorku.ca to the TA's name to email them. Textbooks Required (available in the bookstore and on reserve in Steacie):  Computer Organization and Design, 5th Edition: The Hardware/Software Interface by D. Patterson and J. Hennessy, Morgan Kaufmann Publishers (2014). References:  MIPS Assembly Language Programming, by Robert Britton, Pearson Education (2003)  Structured Computer Organization, 5th edition, by Andrew S. Tanenbaum, Prentice Hall (2006)  MIPS RISC Architecture, by G. Kane & J. Heinrich, Prentice Hall (1992)  Computer Organization, 5th Edition, by V.C. Hamacher, Z.G. Vranesic & S.G. Zaky, McGraw-Hill (2002)

home.1399069517.txt.gz · Last modified: 2014/05/02 22:25 by khuwaja

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