====== The Single-Cycle CPU ======

This lecture covers the design and implementation of the MIPS CPU using a single-cycle approach. Albeit slow, this implementation is very simple and clean and allows us, once we understand it, to explore more sophisticated approaches.

===== Outline =====

  * Combinational and Sequential Circuits
  * Building the CPU's datapath to support R-type
  * Adding support for addi
  * Adding support for load/store
  * Implementing branches and jumps
  * Building the control
  * Performance issues

===== Big Ideas =====

  * The software meets the hardware
  * The role of the CPU clock

===== Slides from Lecture =====

  * [[http://www.cse.yorku.ca/~roumani/course/2021/HW.pdf|The circuit building blocks]]
  * [[http://www.cse.yorku.ca/~roumani/course/2021/CPUsc.pdf|The Single-Cycle CPU]]


===== To Do =====

  * Read Sections 5.1-5.4 of the textbook (5.1-5.3 in the old edition).
  * Do the single-cycle exercises accessible through the //Resources// page.