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2 lab section

  • Monday 7-10 LAS 1006
  • Tuesday 7-10 LAS 1006/2

The lab material is developed by Prof. Hamzeh Roumani

The lab manual presents a simple introduction to Verilog. If you are going into computer engineering or electrical engineering, Verilog is very important. here are some more resources that will help you understand verilog

A very good tutorial by Dr. Dr. Daniel C. Hyde Computer Science Department Bucknell University Introduction

Guidlines Voted Best Paper SNUG-2000 San Jose, CA

veriwell (verilog simulator) veriwell.pdf Author unknown

* MIPS project – this is a 2 weeks lab here is an example input filetest_case.txt and the output response.txt The above files contains addi and or which you were asked to implelemnt, here is the new input file code_1.txt, the output file response_1.txt and the asm file case.txt

lab.1413052259.txt.gz · Last modified: 2014/10/11 18:30 by aboelaze

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