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course_outline [2011/12/30 15:25] allisoncourse_outline [2014/11/04 17:53] (current) hchesser
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 ============ Course Outline: Embedded Systems ============ ============ Course Outline: Embedded Systems ============
 +EECS 3215 Winter 2014
 +Department of Electrical Engineering and Computer Science
  
-CSE 3215 Winter 2010 
-Department of Computer Science and Engineering 
-York University,  Toronto, Ontario 
  
 +====== Instructor ======
 +[[http://www.yorku.ca/chesser|Hugh Chesser]], PSE 246, e-mail: hugh DOT chesser AT lassonde DOT yorku DOT ca, Office hours: T, R 14 - 16 (or by appointment)
  
  
  
-[[https://w2prod.sis.yorku.ca/Apps/WebObjects/cdm.woa/7/wo/2XA7pU4pLt5PLDEQSENaag/3.1.9.8.3.0.0.5|Fall/Winter 2011-2012 Schedule]]+====== Teaching Assistants (TAs) ====== 
 +TBD
  
 +====== Class and Lab Locations ======
  
 +  * Lectures: T, R 16:00-17:30 in TBD.
 +  * Lab-01: M 13:00-16:00 in LAS 1002A.
 +  * Lab-02: F 13:30-16:30 in LAS 1002A. 
  
-====== Contact ====== 
  
-[[contact | Instructor: RAllison; TA: Kyle WattersNariman Farsad]]+====== Course overview and Outcomes ====== 
 +Unlike a general-purpose computer, such as a personal computer, an embedded system is a special-purpose system in which the computer is completely encapsulated by the device it controlsThe embedded system design consists of hardwaresoftware, analog microelectronics, sensors and actuators which are combined for a specific application ranging from communications, to transportation, avionic and to medical instrumentation. Students will gain in-depth technical competence in the various areas including the design of hardware/software for embedded systems, the design of analog interfacing system along with the selection of appropriate sensors and actuators.
  
-====== Overview ======+ 
  
-Embedded systems are an important area of computer engineering and a large and growing market for computing technology. The trends to mobile computing, ubiquitous computing, and pervasive computing combined with ever increasing computational power and powerful new paradigms in hardware design are changing embedded systems design. In this course we consider the design of embedded hardware and software under pressures and constraints including performance, cost, size, time to market, power, ...+====== Prerequisites ====== 
  
-====== Prerequisites ======+Students should have a good understanding of digital and analog electronics and computer organization. You should also be familiar with assembly programming (C programming will be helpful).
  
  
-The departmental prerequisites for this course are general pre-requisites and CSE3201.04 (i.e. the latest version of the course, taught using Verilog and with a hardware lab component). Students should have a good understanding of digital and analogue electronics and computer organisation. You should also be familiar with assembly and C programming (CSE 2031, CSE 2021). 
  
-====== Topics (tentative) ====== 
  
-^  Week  ^  Dates  ^  Lecture  ^  Lab  ^ 
-| 1  | Jan 3, 5 | Introduction  | No lab  | 
-| 2  | Jan 10, 12  | Microcontrollers, 68HCS12 architecture and instruction set | Lab 0 (Safety Issues, Introduction to Facilities and Tutorial  | 
-| 3  | Jan 17, 19  | Peripherals  | Lab 1  | 
-| 4  | Jan 24, 26  | Interrupts  | Lab 2  | 
-| 5  | Jan3, Feb 2 | Peripherals & Interrupts  | Lab 3  | 
-| 6  | Feb 7, 9   | Memory and Busses   | Lab 3 con'  | 
-| 7  | Feb 14, 16  | Interfacing  | Lab 4  | 
-|    | Feb 22, 24  | READING WEEK  | No lab  | 
-| 8  | Feb 28,Mar 1  | Interfacing  | Lab 4  | 
-| 9  | Mar 6, 8   | Analogue interfacing  | Lab 5  | 
-| 10  | Mar 13, 15   | Programmable Logic and Rapid prototyping using FPGAs  |Lab 5 con' | 
-| 11  | Mar 20, 22   | Power, High Speed and other design constraints (time permitting)  | Lab 6  | 
-| 12  | Mar 27, 29   | Power, High Speed and other design constraints (time permitting)  | Lab 6  | 
-| 13  | Apr 3   | Lab demos  | Lab 6  | 
  
-Quizzes will be held during class periods. 
  
-====== Evaluation ====== 
- 
-[[grades| Grades and Grading]] 
- 
- 
- 
- 
-====== Laboratory ====== 
- 
-[[laboratory:start| Lab information]] 
  
  
 + 
  
  
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