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CSE4210 Architecture and Hardware for Digital Signal Processing

Description

The field of DSP (digital signal processing)is driven by two major forces, advances in DSP algorithms, and advances in VLSI technology that implements those algorithms. This course addresses the methodologies used to design custom or semi-custom VLSI circuits for DSP applications. Several techniques, such as pipelining, retiming, parallel processing, and folding, are introduced for speed enhancement, area reduction, and power saving.

Learning Outcomes

Upon completion of the course, students should be able to:

  1. map a DSP algorithm to a graphical representation and determine its iterative bound;
  2. use pipelining, retiming, and parallel processing to improve the performance of a DSP implementation;
  3. use folding technique to reduce silicon area in a DSP implementation;
  4. assess alternative architectures for a given set of design specifications.

Instructor & Office Hours

Lecture and Lab Times

  • Lectures: Monday and Wednesday, 13:00 - 14:30, SC 219
  • Labs: Tuesday 11:30 - 13:30 LAS 3057

Teaching Assistant

  • Mr. Mingfei Wang, email: mingfei AT cse DOT yorku DOT ca
  • Office hour: TBD at LAS 2013
start.1420899900.txt.gz · Last modified: 2015/01/10 14:25 by peterlian

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