Summer 2016

CSE2021 is a unique course in that it bridges the gap between software (S/W) and hardware (H/W) and exposes the roles played by the operating system (O/S) and the digital logic (D/L) circuits. It relies on a hierarchy of abstractions to present the material in layers, switching roles from “using” to “implementing” at every stage. It follows the journey of instructions from high-level to assembly and machine code, through the stack, the heap, and the caches, to the CPU's datapath and control. The lecture coverage is augmented by labs that provide hands-on experience in MIPS and Verilog.

By the end of the course, you are expected to be able to:

• Translate a given high-level program to assembly/machine language
  • Represent numbers, characters, and other forms of data in binary
  • Express logic using assembly language instructions
  • Utilize registers, the stack, the heap, and the data segment to store data
  • Encode assembly language instructions in machine language format

• Build a CPU out of basic building blocks such as gates and flip-flops
  • Build the ALU using gates and Verilog
  • Design the CPU's datapath and control
  • Implement a pipeline and handle its hazards
  • Augment the CPU with a cache

• Assess the end-to-end performance
  • Identify the key performance drivers and their physical limits
  • Compare and contrast the RISC and CISC approaches
  • Compute the throughput of a pipelined CPU for a given code fragment
  • Analyze the effect of a cache of a given specs on the system's performance