EECS2021E

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 concrete implementations on  concrete implementations on 
 a modern RISC processor. a modern RISC processor.
 +
 +===== Learning Outcomes  =====
 +
 +  - Translate  high level  code  to  assembly  language  and  machine code
 +  - Represent  data  in  machine  readable  form  and  describe  how  it  is stored and manipulated in a CPU
 +  - Synthesize hardware of increasing complexity from logic gates to a simple CPU using a Hardware Description Language.
 +  - Evaluate  computer  performance  and  compare  performance  on different architectures and designs.
 +  - Describe and critique I/O and Parallel Hardware.
 +
  
 ===== Lecture Times ===== ===== Lecture Times =====
  
   * Section E: Mondays and Wednesdays, 5:30pm - 17:00pm, LAS B   * Section E: Mondays and Wednesdays, 5:30pm - 17:00pm, LAS B
 +  * LAB 01 Mon. 7:00pm-10:00pm LAS 1006
 +  * LAB 02 Tue. 7:00PM-10:00pm LAS 1006
  
start.1504026435.txt.gz · Last modified: 2017/08/29 17:07 by aboelaze