Differences

This shows you the differences between two versions of the page.

--- start [2017/08/29 17:36] – aboelaze
+++ start [2017/08/29 17:41] (current) – aboelaze
@@ Line 15: / Line 15: @@
 and cost; Instruction set design and measurements of use; Pipeline design techniques; Memory
 hierarchy design; Input output subsystems;
+===== Course Learning Outcomes  =====
+By the end of this course, the student should be able to
+  - Design  cache,  memory hierarchy,  and  virtual  memory  using different techniques to improve cost/performance ratio.
+  - Demonstrate  how  dynamic  scheduling  and  speculative  execution can  improve  the  system  performance  and  explain  how  it  is implemented in modern processors.
+  - Evaluate different design alternatives and make quantitative/qualitative argument for one design over the other.
+  - Identity the different types of parallelism (data, instruction, thread, transaction) for a given application.
+  - Compare and  evaluate different techniques (such as multithreading, multicore, or vector) to improve CPU performance
 ===== Lecture Times =====
-  * Section A: Mondays and Fridays, 11:00am - 12:00pm, CSE 111
+  * Section T: Tuesdays and Thursdays, 10:00am - 11:30pm, PSE 321