Due date: Oct 16. The midterm is on Oct 18. I will hand out solution after Tuesday class
What is the number of overhead bits for a 64KB cache with these parameters (tag+dirty+valid)?
Direct mapped with 64-word block size
4-way set associative with 64-word block size
Direct mapped with 32-word block size
4-way set associative with 32-word block size
Is it necessary to have the page size be a power of 2? Could it be any size? would it be practical
Consider an array of size 1000-by-1000 double words. A direct mapped 64KB with a block size of 128 bytes. How many miss if we accessed the cache in a row-major fashion? A column major fashion? Assume that the array is stored in a row major fashion
Consider a toy cache with 8-byte block size and capacity of 64 bytes. which of these references are hits and which are miss. Assume the cache is direct mapped
0xB8
0xBC
0xFC
0xB4
0x77
0xF0