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--- labs [2021/01/31 17:50] – aboelaze
+++ labs [2021/03/29 17:59] (current) – aboelaze
@@ Line 12: / Line 12: @@
 ===== LAB 2 =====
-{{:lab_2-desktop-btqj33p-desktop-btqj33p.pdf|LAB 3}}
+{{:lab_2-desktop-btqj33p-desktop-btqj33p.pdf|LAB 2}}
@@ Line 20: / Line 20: @@
 ===== LAB 3 =====
-{{:lab_3.pdf|}}
+{{:lab_3.pdf|LAB 3}}
 The Verilog code should be according to the following prototype. It will be submitted separately using //**submit**// or //**websubmit**//
@@ Line 45: / Line 45: @@
 ===== LAB 4 =====
+{{:lab_4.pdf|LAB 4}}
+-----------------
 ===== LAB 5 =====
+Her is {{:lab_5_1.pdf|LAB 5}} due March 21
 ===== LAB 6 =====
+{{:lab_6_2020.pdf|LAB 6}}