Differences

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--- oxforddec192007:start [2015/02/05 01:52] – magiero
+++ oxforddec192007:start [2016/02/23 03:21] (current) – magiero
@@ Line 19: / Line 19: @@
 ==== - Current Sensor [0095] - [0108] ====
-{{ sensecirc.png?300}}
+{{ cellsidefull.png?300}}
-• [0095] Connect a sensor circuit 26 to the chamber contacts.
+• [0095] Connect a sensor circuit 26 to the chamber contacts.\\
-• [0098] 40 applies a bias voltage to the top electrode 24.\\
+• [0098] 40 applies a bias voltage to the top electrode 24 (they must mean 25).\\
 • [0099] The amplifier 41 amplifies the current picked up by the bottom electrode 21.\\
 • [0101] 42 may be a **transimpedance amplifier** with a feedback resistor of say 500 MΩ to amplify currents on the order of 10s to 100s of pA.\\
 • [0102] A **capacitive feedback** integrator amplifier is another option.  Has dead time.  This dead time may be reduced to around a microsecond so is not of much consequence if the sampling rate required is much higher.  A transimpedance amplifier is simpler if the bandwidth required is smaller.  Generally, the switched integrator amplifier output is sampled at the end of each sampling period followed by a reset pulse.\\
-{{ cellsidefull.png?300}}
+{{ sensecirc.png?300}}
 • [0103] The second amplifier stage 43 amplifies and filters the voltage signal output by the first amplifier state.  For example raise signal from 50 mV to 2.5 V.\\
-• [0106] In the case of **plural recesses** 5, each having a respective electrode 21, then the electrical circuit 26 is modified by **replicating** the amplifier circuit 41 and A/D converter 47 fore each electrode 21 to allow acquisition of signals from each recess 5 **in parallel**.\\
+• [0106] In the case of **plural recesses** 5, each having a respective electrode 21, then the electrical circuit 26 is modified by **replicating** the amplifier circuit 41 and A/D converter 47 for each electrode 21 to allow acquisition of signals from each recess 5 **in parallel**.\\
 {{ systemarchitecture.png?500}}
-• [0107] Fig. 14 shows a possible architecture.  The bottom (current receiving) electrodes 21 are connected to the electrical circuit 26 by interconnection 55.  The amplifier circuits may be formed in **one or more amplifier chips** 56 having plural channels.  The signals from different electrodes 21 may be on separate channels or multiplexed together on the same channel.  The outputs of the one or more amplifier chips 56 are supplied via the **A/D converter** 47 to a **programmable logic** device 57 for receiving the signal on each channel.  For example to handle signals from an apparatus having 1024 recesses, the programmable logic device 57 might operate at a speed of the order of 10 Mbits/s.
+• [0107] Fig. 14 shows a possible architecture.  The bottom (current receiving) electrodes 21 are connected to the electrical circuit 26 by interconnection 55.  The amplifier circuits may be formed in **one or more amplifier chips** 56 having plural channels.  The signals from different electrodes 21 may be on separate channels or multiplexed together on the same channel.  The outputs of the one or more amplifier chips 56 are supplied via the **A/D converter** 47 to a **programmable logic** device 57 for receiving the signal on each channel.  For example to handle signals from an apparatus having 1024 recesses, the programmable logic device 57 might operate at a speed of the order of 10 Mbits/s.  58 is an interface, for example USB.
-{{ obliquecells.png?500}}
+{{ obliquecells.png?300}}
 ==== - Cell Material Components [0109] - [0117] ====
-• [0115] Platinum coated with silver and then silver chloride at the exposed (to aqueous solution) surface for 20 and 23 is one possibility.  Other possibilities for 20 included silver/silver chloride electrode ink; silver with or without a surface layer, for example of silver chloride formed by chloridisation or of silver fluoride formed by fluoridisation; gold with or without redox couple in solution; platinum with or without redox coupled in solution; ITO with an without redox couples in solution,; gold electrochemically coated with conductive polymer electrolyte; or platinum electrochemically coated with conductive polymer electrolyte.\\
+• [0115] Platinum coated with silver and then silver chloride at the exposed (to aqueous solution) surface for 20 and 23 is one possibility.  Other possibilities for 20 included silver/silver chloride electrode ink; silver with or without a surface layer, for example of silver chloride formed by chloridisation or of silver fluoride formed by fluoridisation; gold with or without redox couple in solution; platinum with or without redox coupled in solution; ITO with an without redox couples in solution; gold electrochemically coated with conductive polymer electrolyte; or platinum electrochemically coated with conductive polymer electrolyte.\\
+{{cellside.png?300}}
 ==== - Cell Manufacture Methods [0118] - [0123] ====
@@ Line 48: / Line 49: @@
 ==== - Forming a Layer of Amphiphilic Molecules [0152] - [0159] ====
+• [0158] Method applicable to any amphiphilic molecules, not just lipids.\\
+• [0159] Aqueous solution 10 can be of broad range.  Should be "physiologically acceptable", buffered to pH of 3 to 11, depending on amphiphilic molecules and final application of layer 11. An example of aqueous solution 10 is 10mM PBS containing 1M NaCl with pH of 6.9.\\
 ==== - Method of Using Apparatus 1 [0160] - [0183] ====
 {{ layerform1.png?300}}
-• [0161] First, a pre-treatment coating 30 is applied to the body 2 across the recess 5.  The pre-treatment coating 30 is a hydrophobic fluid which modifies the surface of the body 2 surrounding the recess 5 to increase its affinity to the amphiphilic molecules.\\
+• [0161] First, a pre-treatment coating 30 is applied to the body 2 across the recess 5.  The pre-treatment coating 30 is a **hydrophobic fluid** which modifies the surface of the body 2 surrounding the recess 5 to increase its affinity to the amphiphilic molecules.\\
+• [0162] 30 is usually an **organic substance** with long chain molecules in an **organic solvent**.\\
+**Organic Substance**
+  * n-decane
+  * hexadecane, etc.
+**Organic Solvent**
+  * pentane
+  * hexane
+  * heptane, etc.
+• [0163] Example mixtures include:
+  * 0.3% hexadecane in pentane
+  * 1.0% hexadecane in pentane
+  * 10% hexadecane in pentane
+  * 1% hexadecane + 0.6 mg/ml DPhPC lipid in pentane
+• [0164] Pre-treatment may be applied in "any suitable manner", for example by capillary pipette: __**SO IT'S NOT AUTOMATED?!?!?!**__\\
 • [0168] After application of the pre-treatment coating 30, the aqueous solution 10 is flowed across the body 2 to cover the recess 5.  This step is performed with the amphiphilic molecules added to the aqueous solution 10.
 • [0169] The layers 11 have high resistance providing highly resistive electrical seals, having an electrical resistance of 1 GΩ or more, typically at least 100 GΩ which, for example, enables high-fidelity stochastic recordings from single protein pores.\\
@@ Line 65: / Line 83: @@
 {{ layerform2.png?200}}
 • Want to avoid coating on electrode.\\
+• [0201] **Electro-Wetting**, apply voltage to electrodes 21 and 24 to blow-off the pre-treatment covering electrode 21.\\
 ==== - Example 1 [0208] - [0218] ====
@@ Line 82: / Line 101: @@
 • [0249] In the apparatus 1, the conductive track 27 experience some degree of **parasitic capacitance and leakage**, both between tracks 27 and between track and aqueous solution 10.\\
 • [0250] By way of example, typical figures may be obtained by modeling the lipid bilayer as a capacitive element with a typical value for the capacitance per unit area of 0.8 uF/cm² (8 fF/um²).  For a 100 um diameter bilayer and 20 um deep recess the capacitance is 63 pF with a track-solution parasitic capacitance of 0.13 pF.  However scaling to smaller bilayers of 5 um diameter and 1 um deep the capacitance is 0.16 pF with parasitic capacitance 0.53 pF.\\
-• [0251] To reduce the parasitics try a combination of flip-chips and through silicon vias (or some equivalent).  One such structure is referenced in [[oxfordapr2009b:start | Dec. 19, 2009 patent]]
+• [0251] To reduce the parasitics try a combination of flip-chips and through silicon vias (or some equivalent).  One such structure is referenced in [[oxfordapr202009b:start | Dec. 01, 2009 patent]]
 {{tsv1.png?350}}
 {{tsv2.png?350}}