las1004_generalized_signal_processing_gsp_lab:start
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| las1004_generalized_signal_processing_gsp_lab:start [2020/12/14 18:54] – jaspal | las1004_generalized_signal_processing_gsp_lab:start [2021/03/17 13:55] (current) – jaspal | ||
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| ===== EECS 3201, Digital Logic Design Course ===== | ===== EECS 3201, Digital Logic Design Course ===== | ||
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| The Xilinx **Zybo** board, with Zynq 7000 device. For Xilinx boards, Vivado SW is used. For the on-board components, click [[for Zybo_Comps]].\\ | The Xilinx **Zybo** board, with Zynq 7000 device. For Xilinx boards, Vivado SW is used. For the on-board components, click [[for Zybo_Comps]].\\ | ||
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| + | The low-cost Altera **DE10_Lite** board, with Max 10 has been used during the remote labs. To see on-board components, click [[for DE10_Lite_Comps]].\\ | ||
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| ===== Additional Labs, performed in the GSP lab. ===== | ===== Additional Labs, performed in the GSP lab. ===== | ||
las1004_generalized_signal_processing_gsp_lab/start.1607972096.txt.gz · Last modified: by jaspal
