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--- start [2016/04/24 01:17] – khuwaja
+++ start [2016/07/12 20:29] (current) – khuwaja
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       * Compute the throughput of a pipelined CPU for a given code fragment
       * Analyze the effect of a cache of a given specs on the system's performance
+===== Instructor & Office Hours =====
+  * Instructor: Gulzar Khuwaja
+  * Lectures: W 7:00-10:00 pm in LSB 105
+  * Labs: M 7:00-10:00 pm in LAS 1006
+  * Office Hours: W 5:30–6:30 pm in LAS 2015
+  * Office Phone: (416) 736-2100 x 70139 (available only during office hours)
+  * Email: khuwaja@cse.yorku.ca
+  * Email Filter: The string CSE2021/X in the Subject field, where X is your username on red@cse
+===== Teaching Assistants =====
+  * Davoudi, Heidar
+  * Jia, Meng
+  * Moury, Sanjida
+  * Pan, Hengyue
+^      TIME      ^ OFFICE	 ^    NAME       ^  EMAIL  ^  TYPE OF HELP OFFERED                                                       ^
+| Monday 6:00pm - 7:00pm | LAS 3027 | Meng Jia | mjia@cse.yorku.ca | Any question about labs |
+===== Textbooks =====
+**Required** (available in the bookstore and on reserve in Steacie):
+  * Computer Organization and Design, 5th Edition: The Hardware/Software Interface by D. Patterson and J. Hennessy, Morgan Kaufmann Publishers (2014).
+**References**:
+  * MIPS Assembly Language Programming, by Robert Britton, Pearson Education (2003)
+  * Structured Computer Organization, 5th edition, by Andrew S. Tanenbaum, Prentice Hall (2006)
+  * MIPS RISC Architecture, by G. Kane & J. Heinrich, Prentice Hall (1992)
+  * Computer Organization, 5th Edition, by V.C. Hamacher, Z.G. Vranesic & S.G. Zaky, McGraw-Hill (2002)