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assignments:a4

From the textbook

  • 4.3
  • 4.5
  • 4.7
  • 4.8
  • 4.13
  • 4.16
  • 4.20

4.3 – 35% 100% 76% It is always producing the sign extended number needed or not

4.5 – The instruction is sd x12, 20(x1)

4.5-1 – 00 and 0010 ( we did not cover this in details)

4.5-2 – PC+4

4.5-3 – ALUsrc inputs are Reg[x12] and immediate output is immediate (0x0000000000000014)

4.5-4 – ALU inputs Reg[x12] and immediate

4.7 – 700, 950, 905, 705, 700 , 905 psec.

4.8 – 1.174

4.13 – need MUX's and paths to these mux's

4.16 –

4.16.1 Pipelined: 350; non-pipelined: 1750 4.16.2 Pipelined: 1750; non-pipelined: 1250 4.16.3 Split the ID stage. Th is reduces the clock-cycle time to 300ps. 4.16.4 35%. 4.16.5 65%

4.30 –

addi x11, x12, 5

NOP

NOP

add x13, x11, x12

addi x14, x11, 15

NOP

add x15, x13, x12

assignments/a4.txt · Last modified: 2017/12/12 22:28 by aboelaze

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