Differences

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--- assignments:start [2019/09/09 03:22] – aashouri
+++ assignments:start [2019/09/12 13:45] (current) – aashouri
@@ Line 13: / Line 13: @@
-== RVS Simulator ==
+=== RISC-V Green Card ===
+[[https://www.eecs.yorku.ca/course_archive/2019-20/F/2021E/lectures/RISCV-GreenCard.pdf|RISCV-GreenCard]]
+=== RVS Simulator ===
 For Labs A-D we will use the RISC-V Visual Simulator (RVS) on the workstations in LAS1006.
 The current version of the RVS simulator can be invoked by typing rvs in a terminal window.
+You can also download the latest version of RVS (046) for your own personal use at home here:
+[[https://www.eecs.yorku.ca/course_archive/2017-18/F/2021S/RVS/RVS046|RVS Linux]]
+[[https://www.eecs.yorku.ca/course_archive/2017-18/F/2021S/RVS/RVS046.mac|RVS Mac]]
+[[https://www.eecs.yorku.ca/course_archive/2017-18/F/2021S/RVS/RVS046.exe|RVC Windows]]
+== RVX Simulator ==
 [[https://www.eecs.yorku.ca/course_archive/2019-20/F/2021/clone/labs/RVS-Manual.pdf|RVS user Manual]]
 [[https://www.eecs.yorku.ca/course_archive/2019-20/F/2021/clone/labs/RVS-Assembler.pdf|RVS Assembler Manual]]
 [[https://www.eecs.yorku.ca/course_archive/2019-20/F/2021/clone/labs/RVS-FPextension.pdf|RVS Floating-point (FP) Extension Manual]]
 [[https://www.eecs.yorku.ca/course_archive/2019-20/F/2021/clone/labs/RVS-IOsyscalls.pdf|RVS Input/Output System Calls Manual]]
 [[https://www.eecs.yorku.ca/course_archive/2019-20/F/2021/clone/labs/RVS-FAQ.pdf|RVS FAQ]]
-== Verilog Labs ==
+=== Verilog Labs ===
 For Labs K-N, we will use Icarus Verilog on the workstations in LAS1006.
@@ Line 32: / Line 55: @@
 [[https://www.eecs.yorku.ca/course_archive/2019-20/F/2021/clone/labs/Verilog%20Quick%20Reference%20Card%20v2_0.pdf|Verilog Quick Reference Card]]
 [[https://www.eecs.yorku.ca/course_archive/2019-20/F/2021/clone/labs/Verilog_Overview_VN.pdf|Verilog Mini reference]]
 [[https://www.eecs.yorku.ca/course_archive/2019-20/F/2021/clone/labs/ref.pdf|verilog Reference Guide]]
 [[https://www.eecs.yorku.ca/course_archive/2019-20/F/2021/clone/labs/hrLib.zip|Sequential component library modules for Labs M and N]]
 [[http://iverilog.icarus.com/home|Icarus Verilog Download]]
 == Labs (Available on its day)==
@@ Line 53: / Line 81: @@
   * [[:assignments:a7|Assignment 7]]
   * [[:assignments:a8|Assignment 8]]
+== Submissions ==
+Submit the prelabs (the examples and the exercises in the lab book) right after you save your work in a file as instructed, using the following command (change PreA and a1a.asm as needed):
+**submit 2021 PreA a1a.asm**
+Submit the the lab assignment (your solution to the secret question revealed in the middle of the lab time) by the end of the current lab as instructed, using the following command (change LabA01 and aas5a.asm as needed):
+**submit 2021 LabA01 aas5a.asm**
+Important:   If you misss a lab you will get 0 points unless you do the makeup for the missed lab. You are allowed to do ONE makeup lab out of A, B, C, and D, and ONE makeup lab out of K, L, M, and N. For any additional missed lab, the procedure for a missed test (see the Tests section) will apply.