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Labs

Lab 1: Verilog/Schematic Design Entry Tutorial

Lab Date: Mon. Sept. 23, 2013 in LAS 1004A

An introduction to FPGA programming on the DE2 Development System (see DE2 Documentation below for more info). You'll be doing both Verilog and Schematic entry. Please read both documents ahead of time.

Verilog Entry on Quartus II

Schematic Entry on Quartus II

Each of these two tutorials asks you to go from “Starting a New Project” to “Testing the Designed Circuit” you must demonstrate a working circuit (obtained from both a Verilog and Schematic starting point) by the end of the lab to get full marks. If you read ahead this should be easy and will effectively serve as your prep points (if you don't read before the lab you will find it hard to finish).

DE2 Documentation

labs.1379449995.txt.gz · Last modified: 2013/09/17 20:33 by magiero