This lecture covers Program Execution (a closer look at DRAM, the CPU, and the fetch-execute cycle) and introduces assembly language. The SPIM simulator is used to demonstrate writing and running programs for the MIPS family of processors.

• Played Jeopardy on DRep and the Foundation
• Review of the Fetch Execute cycle – LMC
• A model for DRAM
• Representing program and data in DRAM
• A model for the CPU
• Assembly Language Programming
• MIPS programming

• Memory Blocks
• All types are represented as numbers
• CPU = Registers + Datapaths + Control + BIU
• The more registers the better. “Better” means easier to program (the 1-reg LMC can do anything the 32-reg MIPS can).
• Programming in assembly language

• Program Execution
• LMC demo from the University of Herfordshire, UK
• Applet that simulates the LMC from Illinois State University, USA

• Complete the Drep homework this week.
• Read Chapter 2 of our textbook up to, and including, Section 2.8 but skip Section 2.4. (If you have the old edition of the textbook, read Ch 3 up to and including, Sec 3.7 but skip Sec 3.4.)
• Download SPIM to your home machine and/or use the one in Prism.
• Complete the programs developed in class (see the Resources page).
• Start reading and performing the tasks of Lab-A. Optional