The course outline is a guideline to topics that will be discussed in the course, and when they will be discussed:

Chapter 1 Introduction

Continue with introduction

Instruction level parallelism Part 1 and here 2 slides per page

Assigned reading

Tuesday 3.1 Review of hazards (already covered in 2021) will not be covered in the class 3.2 Basic compiler techniques

Quiz 1 (Thursday) moved to next week

Reducing branch cost Prediction and here 2 slides per page

Section 3.3 in the text. A more detailed explanation of predictors is given in C.2 pp C_21 to C-30. The third and second edition of the text have a more detailed coverage of branch predictors.

Assigned reading

Tuesday 3.4 Dynamic scheduling

Thursday 3.5 Example

Dynamic scheduling Tomasulo and ROB and here 2 slides per page section 3.6

Quiz 1 (Thursday)

Superscalar and VLIW section 3.7 and 3.8: here

Cache Part 1

Section: 2.1 and 2.2

Midterm (Tuesday)

The makeup midterm is Friday 3:30 (my office)

cache Part 2

Quiz 2 Thursday moved to Tuesday Nov. 10

Here is a list of papers for the paper review project. If you have another idea, please discuss it with me.

Virtual memory

Assignment 2 has been posted

Some practice questions for the quiz

1. Examples in the slides
2. 2.1, 2.2, 2.3 Exact solution for these problems might take more than the 20 minutes allocated to the quiz, but you have to be familiar with the idea.

Thread level parallelism and cache coherence (Chapter 5)

here is an example trace file. the format is instruction: R/W memory_address

Trace

Quiz 3 (Thursday)

Continue with cache coherence

NoC Network on Chip, or how to connect the cores

• Chapter 1
• Cahpter 2 2.1-2.3
• Chapter 3 3.1-3.9, 3.12 and DRAM notes
• Chapter 5 5.1-5.6